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For variable assignment in make, i see := and = operator. I want to use the make command as part of setting up the code environment, but i'm using windows. In other words, i want to pass some arguments which will eventually become variables in the makefile.
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Msys2 have many types of runtime and they. I usually pass macro definitions from make command line to a makefile using the option: The language accepted by gnu make is a superset of the one supported by the traditional make utility.
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Can i pass variables to a gnu makefile as command line arguments? Cd subdir && $(make) the value of this variable is the file name with which make was invoked. What's the difference between them?
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If this file name was /bin/make, then the recipe executed is cd subdir. The definition is accessible inside the makefile. The error that you've quoted must have been preceded by an error from gcc, please quote that as well.
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By using 'gmake' specifically you can use gnu make extensions. + i was not familar.
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